1. Field of the Invention
The present invention relates to a data interface circuit and data transmitting method.
2. Description of the Related Art
High speed transmission of signals between circuits of electronic equipment is required with high speed processing of a CPU (Central Processing Unit) built in the electronic equipment. However, when the transmission of signals is increased, EMI (Electronic Magnetic Interface), which causes an erroneous operation of electronic equipment between transmission lines, is generated. As a transmission method for preventing occurrence of this EMI, there is a differential transmission method. This differential transmission method is a transmission method in which a voltage to current conversion circuit converts a single voltage signal into a positive-phase current signal and an opposite-phase current signal to transmit each of the converted positive current signal and opposite current signal through a different transmission line.
Unexamined Japanese Patent Application KOKAI Publication No. 2001-53598 discloses a data interface circuit that transmits data by this differential transmission method. The content of this document is included in this specification.
This interface circuit includes a transmission section and a reception section. The transmission section has a first MOS transistor and a second MOS transistor that are turned on alternatively according to a binary input voltage signal. The reception section has a third MOS transistor and a fourth MOS transistor. The third MOS transistor is connected to the first MOS transistor through a first transmission line and supplies a current signal to the first transmission line when the first MOS transistor is turned on. The fourth MOS transistor is connected to the second MOS transistor through a second transmission line and supplies a current signal to the second transmission line when the second MOS transistor is turned on. The reception section outputs a signal, which is obtained by reversing a drain voltage of the fourth MOS transistor, as a binary output signal.
The first and second MOS transistors of the data interface circuit form a differential pair transistor. When the binary input voltage signal reaches a low (L), the first MOS transistor is turned on. When the binary input voltage signal reaches a high (H) level, the second MOS transistor is turned on. This data interface circuit suppresses occurrence of EMI by passing low-voltage current signals through the first and second transmission lines.
Provision of a plurality of such data interface circuits makes it possible to transmit a plurality of signals.
FIG. 11 is a configuration example of a data interface circuit that transmits a plurality of signals. As shown in FIG. 11, this data interface circuit includes a transmission section 100 having n-channel MOS transistors 11A, 11B, 11C, and 11D and a reception section 200 having current to voltage conversion circuits 12 and 15. Each of the n-channel MOS transistors 11A and 11B is connected to the current to voltage conversion circuit 12 through each of transmission lines 13A and 13B. Moreover, each of the n-channel MOS transistors 11C and 11D is connected to the current to voltage conversion circuit 15 through each of transmission lines 13C and 13D.
The n-channel MOS transistors 11A and 11B form a differential pair transistor. When voltage signals, which include a positive phase signal Din1 and an opposite phase signal D′in1 each generated from a single signal, are input, the n-channel MOS transistors 11A and 11B are turned on alternatively. When the positive phase signal Din1 reaches a high level, the n-channel MOS transistor 11A is turned on to discharge current supplied from the current to voltage conversion circuit 12 to a ground through the transmission line 13A. While, when the opposite phase signal D′in1 reaches a high level, the n-channel MOS transistor 11B is turned on to discharge current supplied from the current to voltage conversion circuit 12 to a ground through the transmission line 13B. The current to voltage conversion circuit 12 converts current, which flows into the transmission lines 13A and 13B alternatively, into voltage and outputs the converted voltage as a binary output signal.
Moreover, n-channel MOS transistors 11C and 11D form a differential pair transistor. When voltage signals, which include a positive phase signal Din2 and an opposite phase signal D′in2 each generated from a single signal, are input, the n-channel MOS transistors 11C and 11D are turned on alternatively. When the positive phase signal Din2 reaches a high level, the n-channel MOS transistor 11C is turned on to discharge current supplied from the current to voltage conversion circuit 15 to a ground through the transmission line 13C. While, when the opposite phase signal D′in2 reaches a high level, the n-channel MOS transistor 11D is turned on to discharge current supplied from the current to voltage conversion circuit 15 to a ground through the transmission line 13D. The current to voltage conversion circuit 15 converts current, which flows into the transmission lines 13C and 13D alternatively, into a voltage and outputs a change in the converted voltage as an output signal.
In this way, the data interface circuit shown in FIG. 11 can transmit two data signals by the differential transmission method.
However, the aforementioned signal processing circuit, data transmission circuit, etc transmit a plurality of signals in synchronization with the same clock. For this reason, currents that flow into the plurality of transmission lines are synchronized with each other. Accordingly, in the configuration that flows current into each transmission line in the same direction as in the data interface circuit shown in FIG. 11, EMI is intensified due to the plurality of synchronized currents, so that occurrence of EMI cannot be suppressed.